ASSUME THE INSTRUCTION IN THE BRANCH OR LOAD
DELAY SLOT IS EXECUTED IN ALL CODE BELOW.
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No due date.
Create a text file on Odin named 2240/8/a8.txt
When you finish this assignment, rename your file to: hw8.txt
In your text file, choose 3 questions that you think are important.
Briefly talk about what you learned from each question. ---------------------------------------------------------------------------------
1. What is the purpose of the branch delay slot?
2. The jump instruction below loads the PC (program counter) with a
32-bit address (all addresses are 32-bits) to an instruction.
32 bits. The j opcode takes 6 bits. The address is left with only 26 bits.
How does MIPS transform a 26-bit address into a 32-bit address?
j target
3. What value will be in $8 after this loop executes 5 times? (MIPS
initializes all registers to zero when a program starts)
4. The jump instruction is an unconditional branch. What happens
if a jump is the only control statement in a loop as shown below?
loop: ..
..
j loop
5. Explain why the control flow in these MIPS statements
bne $5, $6, L1
add $7, $5, $6
L1:
sub $7, $5, $6
more code..
is not equivalent to this C if-else statement, assuming we replace
$5, $6, $7 with variable names a, b, c:
if (a == b)
c = a + b;
else
c = a - b;
more code..
6. Simulating a two-way branch (if-else) in assembly requires either two
conditional branches (like the code below) or a conditional branch and a
jump. In C-like languages the two branches of control always come together
at the first statement after the if-else statement. Is this required to be
the case in assembly?
7. What is the purpose of this code? Write the equivalent algorithm in a C
if-else statement. (Assume that 0x1000 points to the beginning of the
data segment.)
main:
lui $10,0x1000 # Init base register
lw $8,0($10) # Load A
sll $0,$0,0 # load delay slot
srl $9,$8,31 # Shift sign bit to position 0
beq $0,$9,done # sign bit == zero, done
sll $0,$0,0 # branch delay slot
subu $8,$0,$8 # negate A
sw $8,0($10) # save it
done: sll $0,$0,0 # target of the branch
.data
A: .word -1
8. What are relational operators? Give examples.
9. Explain these two instructions, where s denotes a source register.
bltz Rs, label
bgez Rs, label
10. Explain the meaning of this set instruction, where rd is a destination
register and rs and rt are source registers.
slt Rd, Rs, Rt
11. What is the difference between these instructions?
slt Rd, Rs, Rt
sltu Rd, Rs, Rt
12. What is the value in $7 after this code executes?
li $5, -25
li $6, 25
slt $7, $5, $6
13. What is the value in $7 after this code executes?
addiu $5,$0,-25 # treat immediate as a 16-bit unsigned int
addiu $6,$0,25
sltu $7,$5,$6
14. Give the semantics of these instructions and explain
difference between the two.
slti Rd, Rs, imm
sltiu Rd, Rs, imm
15. What is the range of integers that can fit into the 16-bit field of the
sltiu instruction? (These are unsigned integers.)
16. What is the value in $3 after this code is executed?
ori $3, $0, 1 # load 1 into $3
ori $2, $0, 88 # load 88 into $2
sltiu $8, $2, 100 # set on less-than if $2<100
beq $8, $0, out # branch to out: if $8==zero
sll $0, $0, 0 # branch delay instruction (no-op)
sltiu $8, $2, 30 # set on less-than if $2<30
beq $8, $0, next # branch to next: if $8==zero
sll $0, $0, 0 # branch delay instruction (no-op)
out: ori $3, $0, 0 # load zero into $3
next: sll $0, $0, 0 # no-op instruction
17. Assume you are on a *real* MIPS machine where the instruction in the
slot is executed and that you remove the two branch delay no-op
instructions in the above code. Also assume that the original value
in $2 could be less than or greater than 100. How would removing the
two no-op instructions affect the logic of your code?
18. In addition to branch instructions, load instructions are followed by
a delay slot. Why do you think this is?
19. What does this code accomplish?
init: ori $8, $0, 0 # count = 0
test: sltiu $9, $8, 10 # count < 10
beq $9, $0, endloop # branch to endloop: if $9==zero
move $a0, $8 # load $8 into $a0
li $v0, 1 # load 1 into $v1
syscall # print an integer value to screen
addiu $8, $8, 1 # count++
j test # jump to test:
endloop: sll $0, $0, 0 # branch target (no-op)
20. Select A or B. Given the following chunk of MIPS code
li $7, 10 # load 10 into $7
move $8, $zero # load zero into $8
slt $9, $8, $7 # set $9 if $8 < $7
beqz $9, done # branch to done: if $9 is zero (not set)
branch delay slot # <----- what instruction goes there?
... more code ... #
#
done: li $v0, 10 # end program gracefully
syscall #
A. Any instruction can safely be put in this branch delay slot.
B. Only a no-op instruction can safely be put in this branch delay slot.
21. The sll instruction is popular to use as a no-op instruction. Write
a no-op instruction of your own. Do not use sll, and do not use a
nmemonic that is a macro or psuedo-instruction.