CMPS-2240 Homework 9 - Intro to x86 Assembly

The answers to the questions below are found in this x86 assembly guide by David Evans at the University of Virginia. Note that this homework covers x86. You will be coding in x86-64 assembler. There are important extensions to x86-64 but you should understand a little about the x86 ISA before jumping in to x86-64. This Tiny Guide is enough for this homework.


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Create a text file on Odin named: 2240/9/a9.txt

Answer all the questions.

Choose 2 questions.
Put them at the top.
Tell me what you learned from them.
Then,
Explain the x86 lea instruction and what it does, in your own words.
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1. What are the ESP and the EBP registers in x86 assembly used for?

2. The 6 general purpose registers (GPRs) in x86 are EAX, EBX, ECX, EDX, ESI, & EDI. There are also sub-registers. For example, explain the difference between the EAX, AX, AH and AL registers. Give the size of each.

3. Describe what these declarations in the static data segment accomplish. Note that in x86 a word is 2 bytes and a double word is 4 bytes.
   .DATA
   var DB 64 
   var2  DB ? 
   DB 10     
   X  DW ?  
   Y  DD 3000

4. The DUP assembler directive duplicates an initialization. Explain these:
    Z  DD 1, 2, 3
    bytes DB 10 DUP(?)
    arr  DD 100 DUP(0) 
    str  DB 'hello',0

5. Unlike MIPS, x86 supports direct accesses to memory. Note that a WORD is 2 bytes and a DWORD is 4 bytes. The x86 registers EAX, EBX, ECX, EDX, ESI, EDI, ESP, and EBP are 32-bit. Also note that with x86, data movement is always from right to left (there is no operation equivalent to the store operation in x86). With these facts in mind, explain the instructions below.
    mov eax, [ebx]   
    mov [edx], eax   
    mov eax, [esi-4] 
    mov [esi+eax], cl 
    mov BYTE PTR [ebx], 12 
    mov WORD PTR [ebx], 5 
    mov DWORD PTR [ebx], 9

6. The MOV instruction supports register to memory, register to register or memory to register. Explain these:
    mov eax, ebx 
    mov byte ptr [var], 5

7. The push instruction places its operand onto the top of the hardware supported stack in memory. Push first decrements ESP by 4 (bytes), then places its operand into the contents of the 32-bit location at address [ESP]. ESP (the stack pointer) is decremented by push first since the x86 stack grows from high to low addresses. Explain these instructions:
  push eax  
  push [var]

8. The pop instruction copies 4 bytes from the top of the hardware stack at address SP to register or memory. SP is then incremented by 4. Explain these instructions:
    pop edi
    pop [ebx]

9. The Load Effective Address instruction (lea) grabs the address of a label/symbol or computes an address by adding an offset. The effective address is then loaded into the target register. Explain these:
    lea eax, [var] 
    lea edi, [ebx+4*esi]

10. Unlike MIPS, arithmetic operations in x86 can be performed register to register or register to memory. The second operand may be a constant. Explain these:
    add eax, 10 
    add BYTE PTR [var], 10 
    sub al, ah 
    imul eax, [var]
    imul esi, edi, 25

11. Explain these inc, dec instructions
    dec eax 
    inc DWORD PTR [var]

12. Integer division utilizes a 64-bit register EDX:EAX (where EDX is the most significant 32 bits). The idiv instruction divides the contents of EDX:EAX by the operand. The quotient is stored into EAX and the remainder in EDX. Explain these operations:
    idiv ebx
    idiv DWORD PTR [var]

13. The bitwise logical AND, OR and EXCLUSIVE OR instructions perform the operation on the first register place the result in the first register. Explain these operations:
    and eax, 0fH   # 0fH  is 15 in decimal - the H denotes hex 
    xor edx, edx
    neg edx
    not edx

14. The Shift Left and Shift Right instructions perform shifts on the first operand, padding empty bit positions with zeros. The second operand is either an 8-bit constant or the register CL. Explain these shift operations:
    shl eax,1 
    shr ebx,cl

15. In x86, what does the instruction pointer (IP) register hold?

16. The unconditional jump instruction jumps to the given label. The conditional jump instruction jumps based on the contents of a condition bit in the machine status word register. This bit is set to 0 or 1 in the instruction prior to the conditional jump. Explain the control flow instructions below assuming that each is preceeded by cmp eax, ebx:
    jump L1 
    jle done
    je L1
    jge L1

17. The Compare (cmp) instruction compares the values of two operands and sets the condition codes in the machine status word appropriately. The result can then be used to facilitate a jump. Explain these:
      cmp eax, ebx   
      jle done

      cmp DWORD PTR [var], 10
      jeq loop 

18. What do the instructions below facilitate?
    call foo
    return