MIPS Instructions

InstructionSyntaxOpcodeOperationDescription
arithmetic and logical
add add $d, $s, $t 100000$d = $s + $tAdd with overflow
addu addu $d, $s, $t 100001$d = $s + $tAdd unsigned
addi addi $d, $s, i 001000$d = $s + se(i)Add immediate
addiuaddiu $d, $s, i 001001$d = $s + se(i)Add immediate unsigned
and and $d, $s, $t 100100$d = $s & $tBitwise logical AND
andi andi $d, $s, i 001100$d = $s & ze(i)Bitwise logical AND imm
div div $s, $t 011010lo = $s/$t; hi=$s%$tDivide
divu divu $s, $t 011011lo = $s/$t; hi=$s%$tDivide unsigned
mult mult $s, $t 011000hi:lo = $s * $tMultiply
multumultu $s, $t 011001hi:lo = $s * $tMultiply unsigned
nor nor $d, $s, $t 100111$d = ~($s | $t)Bitwise logical NOR
or or $d, $s, $t 100101$d = $s | $tBitwise logical OR
ori ori $d, $s, i 001101$t = $s | ze(i)Bitwise logical OR imm
sll sll $d, $t, a 000000$d = $t << aShift left logical, a bits
sllv sllv $d, $t, $s 000100$d = $t << $sShift left logical, $s bits
sra sra $d, $t, a 000011$d = $t >> aShift right arithmetic, a bits
srav srav $d, $t, $s 000111$d = $t >> $sShift right arithmetic, $s bits
srl srl $d, $t, a 000010$d = $t >> aShift right logical, a bits
srlv srlv $d, $t, $s 000110$d = $t >> $sShift right logical, $s bits
sub sub $d, $s, $t 100010$d = $s - $tSubtract
subu subu $d, $s, $t 100011$d = $s - $tSubtract unsigned
xor xor $d, $s, $t 100110$d = $s ^ $tExclusive OR
xori xori $d, $s, i 001110$d = $s ^ ze(i)Exclusive OR immediate
set register, on comparison
slt slt $d, $s, $t 101010$d = ($s < $t)Set on less than
sltu sltu $d, $s, $t 101001$d = ($s < $t)Set on less than, unsigned
slti slti $d, $s, i 001010$t = ($s < se(i))Set on less than, immediate
sltiusltiu $d, $s, i 001001$t = ($s < se(i))Set on less than, both
branching
beq beq $s, $t, label 000100if ($s==$t) pc+=i<<2Branch if equal
bgtz bgtz $s, label 000111if ($s>0) pc+=i<<2Branch if > zero
blez blez $s, label 000110if ($s<=0) pc+=i<<2Branch if <= zero
bne bne $s, $t, label 000101if ($s!=$t) pc+=i<<2Branch if not equal
jump to
j j label 000010pc += i << 2Jump
jal jal label 000011$31 = pc; pc+=i<<2Jump and link
jalr jalr labelR 001001$31 = pc; pc = $sJump and link, register
jr jr labelR 001000pc = $sJump to address in register
load from memory (right to left)
lb lb $t, i ($s) 100000$t=se (mem[$s+i]:1)Load byte
lbu lbu $t, i ($s) 100100$t=ze (mem[$s+i]:1)Load byte unsigned
lh lh $t, i ($s) 100001$t=se (mem[$s+i]:2)Load halfword
lhu lhu $t, i ($s) 100101$t=ze (mem[$s+i]:2)Load halfword unsigned
lw lw $t, i ($s) 100011$t= i mem[$s+i]:4Load word
lui lui $t, i 100011$t = i<<16Load i into upper halfword
store to memory (left to right)
sb sb $t, i ($s) 101000mem[$s+i]:1=LB($t)Store byte
sh sh $t, i ($s) 101001mem[$s+i]:2=LH($t)Store halfword
sw sw $t, i ($s) 101011mem[$s+i]:4=$tStore word
load hi or low results
mfhi mfhi $d 010000$d = hiMove from high
mflo mflo $d 010010$d = loMove from low
mthi mthi $s 010001hi = $sMove to hi
mtlo mtlo $s 010011lo = $sMove to low
exception and interrupt
trap trap i 011010OS dependent
Notes:

se: SignExtImm = 16 copies of sign bit [15] + imm16
ze: ZeroExtImm = zeros16 + imm16

Branch Address = 14 copies of sign bit + addr16 + zeros2 
Jump Address   = Copy of top 4 bits of PC + jumpAddr26 +  zeros2

Note:
The instructions below are macro-instructions. Each of the following instructions
is made up of one or more of the core MIPS instructions above.

Macro Instructions:
inst syntax description clocks
abs abs Rd, Rs Absolute Value: 3/3
beqz beqz Rs, Label Branch if Equal to Zero: 1/1
bge bge Rs, Rt, Label Branch if Greater Than or Equal : 2/2
bgeu bgeu Rs, Rt, LabelBranch if Greater Than or Equal Unsigned: 2/2
bgt bgt Rs, Rt, Label Branch if Greater Than: 2/2
bgtu bgtu Rs, Rt, LabelBranch if Greater Than Unsigned: 2/2
ble ble Rs, Rt, Label Branch if Less Than or Equal: 2/2
bleu bleu Rs, Rt, LabelBranch if Less Than or Equal Unsigned: 2/2
blt blt Rs, Rt, Label Branch if Less Than: 2/2
bltu bltu Rs, Rt, LabelBranch if Less Than Unsigned: 2/2
bnez bnez Rs, Label Branch if Not Equal to Zero: 1/1
b b Label Branch Unconditional: 1/1
div div Rd, Rs, Rt Divide: 4/41
divu divu Rd, Rs, Rt Divide Unsigned: 4/41
la la Rd, Label Load Address: 2/2
li li Rd, value Load Immediate: 2/2
move move Rd, Rs Move: 1/1
mul mul Rd, Rs, Rt Multiply: 2/33
mulo mulo Rd, Rs, Rt Multiply (with overflow exception): 7/37
muloumulou Rd, Rs, Rt Multiply Unsigned (with overflow exception): 5/35
neg neg Rd, Rs Negate: 1/1
negu negu Rd, Rs Negate Unsigned: 1/1
nop nop No operation: 1/1
not not Rd, Rs Not: 1/1
remu remu Rd, Rs, Rt Remainder Unsigned: 4/40
rol rol Rd, Rs, Rt Rotate Left Variable: 4/4
ror ror Rd, Rs, Rt Rotate Right Variable: 4/4
rem rem Rd, Rs, Rt Remainder: 4/40
rol rol Rd, Rs, sa Rotate Left Constant: 3/3
ror ror Rd, Rs, sa Rotate Right Constant: 3/3
seq seq Rd, Rs, Rt Set if Equal: 4/4
sge sge Rd, Rs, Rt Set if Greater Than or Equal: 4/4
sgeu sgeu Rd, Rs, Rt Set if Greater Than or Equal Unsigned: 4/4
sgt sgt Rd, Rs, Rt Set if Greater Than: 1/1
sgtu sgtu Rd, Rs, Rt Set if Greater Than Unsigned: 1/1
sle sle Rd, Rs, Rt Set if Less Than or Equal: 4/4
sleu sleu Rd, Rs, Rt Set if Less Than or Equal Unsigned: 4/4
sne sne Rd, Rs, Rt Set if Not Equal: 4/4
ulh ulh Rd, n(Rs) Unaligned Load Halfword Unsigned: 4/4
ulhu ulhu Rd, n(Rs) Unaligned Load Halfword: 4/4
ulw ulw Rd, n(Rs) Unaligned Load Word: 2/2
ush ush Rd, n(Rs) Unaligned Store Halfword: 3/3
usw usw Rd, n(Rs) Unaligned Store Word: 2/2

Here is a program named all.s that tries every command above.