lw $s0, 4($t1)
sw $s0, 0($t1)
sub $t0, $s5, $t1
rs
register as the
address of the next instruction (e.g. as the jump target). See page B-64 for
more details on the format of the jr instruction.
Instruction Fetch 250 ps Register Read 75 ps ALU Operation 150 ps Data Memory Access 250 ps Register Write 100 psHow long would it take to execute the following instructions using the simple datapath and how long would it take using the pipelined datapath with 5 stages as described in section 4.5:
lw $t1, 0($t3) sw $t2, 0($s1) add $s3, $a0, $a1